The present invention relates to clamping circuits, and more particularly, to an integrated circuit operated in a class B mode for rapidly charging and discharging a large capacitive load and clamping the voltage thereacross.
Most, if not all, television intermediate frequency demodulating schemes include an automatic frequency control loop (AFC) for locking the oscillator of the loop at the IF frequency as is understood. AFC is typically provided by generating a control or reference voltage on a large capacitor which is varied in accordance with the selected TV channel. It would be further desirable to set a reference voltage on the capacitor whenever the IF section is out of lock so that minimum acquisition time is required to lock onto the IF signal upon acquiring the same.
Therefore, to reduce acquisition time, it would be advantageous to include a clamp circuit of some type to set the aforementioned reference voltage and to supply large dynamic charge or discharge current to the capacitor in a TV receiver. Additionally, the use of a large geometry PNP transistor to provide the charge current to the capacitor should be avoided.
More and more integrated circuit manufacturers are integrating more of the television circuitry onto a single integrated circuit. Hence, these circuits are becoming very complex. This requires the reduction of die area available whereby it is desirable to eliminate the need for large geometry devices such as the PNP transistor described above.
Hence, a need exists for an all NPN clamping circuit to eliminate the need for any large geometry PNP device. Moreover, it is desirable to provide a circuit that can supply large charging and discharging currents when needed but yet need only a relatively small quiescent current for operation.